Timing Constraints - Mon Nov 12 03:04:13 2012
Met | Constraint | Check | Worst Case Slack | Best Case Achievable | Timing Errors | Timing Score |
No | TS_clk_ctrl_clk_dcm = PERIOD TIMEGRP "clk_ctrl_clk_dcm" TS_DSPCLK HIGH 50% | SETUP HOLD | -1.183ns 0.556ns | 9.683ns | 27 0 | 10131 0 |
Yes | TS_clk_ctrl_clk180_dcm = PERIOD TIMEGRP "clk_ctrl_clk180_dcm" TS_DSPCLK PHASE 4.25 ns HIGH 50% | SETUP HOLD | 0.542ns 5.149ns | 7.416ns | 0 0 | 0 0 |
Yes | COMP "slrd" OFFSET = OUT 2.1 ns AFTER COMP "usbclk_in" | MAXDELAY | 0.633ns | 1.467ns | 0 | 0 |
Yes | COMP "slwr" OFFSET = OUT 2.7 ns AFTER COMP "usbclk_in" | MAXDELAY | 0.709ns | 1.991ns | 0 | 0 |
Yes | TIMEGRP "flags" OFFSET = IN 11.3 ns BEFORE COMP "usbclk_in" | SETUP | 0.726ns | 10.574ns | 0 | 0 |
Yes | TIMEGRP "fd" OFFSET = OUT 11.6 ns AFTER COMP "usbclk_in" | MAXDELAY | 0.851ns | 10.749ns | 0 | 0 |
Yes | TIMEGRP "fd" OFFSET = IN 9.8 ns BEFORE COMP "usbclk_in" | SETUP | 2.061ns | 7.739ns | 0 | 0 |
Yes | TS_DSPCLK = PERIOD TIMEGRP "DSPCLK" 8.5 ns HIGH 50% | SETUP HOLD MINPERIOD | 5.733ns 0.815ns 2.513ns | 2.767ns 5.987ns | 0 0 0 | 0 0 0 |
Yes | TS_clk_ctrl_usbclk_dcm = PERIOD TIMEGRP "clk_ctrl_usbclk_dcm" TS_usbclk_in PHASE -0.56875 ns HIGH 50% | SETUP HOLD | 3.696ns 0.653ns | 17.104ns | 0 0 | 0 0 |
Yes | COMP "pktend" OFFSET = OUT 6.2 ns AFTER COMP "usbclk_in" | MAXDELAY | 4.209ns | 1.991ns | 0 | 0 |
Yes | COMP "sloe" OFFSET = OUT 10.3 ns AFTER COMP "usbclk_in" | MAXDELAY | 6.251ns | 4.049ns | 0 | 0 |
Yes | TS_usbclk_in = PERIOD TIMEGRP "usbclk_in" 20.8 ns HIGH 50% | MINLOWPULSE | 12.100ns | 8.700ns | 0 | 0 |
Yes | TIMEGRP "fifoaddr" OFFSET = OUT 16.6 ns AFTER COMP "usbclk_in" | MAXDELAY | 11.381ns | 5.219ns | 0 | 0 |