Integrated Gigasample Processor (iGp12) implements a high-speed (500+ MHz) 12-bit processing channel. The unit is primarily designed for bunch-by-bunch applications in storage rings. However wideband low-noise ADC input and integrated diagnostic features make iGp a valuable bunch-by-bunch diagnostic tool.
Bunch-by-bunch front/back end is designed to provide front- and back-end functionality for a complete set of bunch-by-bunch feedback systems in three planes. The unit integrates three channels of front-end BPM signal processing and phase/amplitude detection as well as the back-end upconversion. Signal chains include programmable attenuators and carrier phase shifters for system gain and timing adjustments. Front/back-end unit interfaces to the iGp12 to allow operator control of adjustable entities.
LLRF4 evaluation board has been designed by Larry Doolittle of LBNL. The board implements a signal processing channel with four 14-bit 125 MSPS ADCs and two 14-bit 260 MSPS DACs. The board includes RF downconversion and upconversion chains and can also be configured for IF processing. USB is used for control and diagnostic interface.